CLARA BOURGEAIS

PhD student (UGA)

CTSYS

Contact details

Building : ESISAR BAT 03

Office : D 233

clara.bourgeais@univ-grenoble-alpes.fr

Website :

Home | Clara Bourgeais

Social networks :

Research topics

My research interest are centerd around my thesis project. I work on compiler back-ends, in particular for risc-v architectures (even though my work can be as general as possible) for hardware security of embedded systems.

Scientific disciplines

Im am working on software countermeasures against physical attacks at the back-end level with the help of tracing-llvm a tool developped by Sebastien Michelland wich enables us to mark critical datas thoughout the compilation process while optimizing the source code. Software countermeasures are not yet online, but feel free to contact me if interested.

Teaching

2025 - Now	Software Engineering and Databases	TD	21 hours
2025 - Now	Operating Systems	TP	7 hours
2024 - Now	Processor Architecture	TP	28 hours
2024 - Now	C Programming Project	TP	32 hours
2024 - Now	Data Structures and Recursive Programming	TP	15 hours
2024	Introduction to Real Time	TP	5 hours

Curriculum vitae

Curriculum Vitae

Professional Experience

2024 - (Now)	PhD Candidate	Grenoble INP - LCIS, UGA in Valence
2024 - (Now)	Teaching assignments (Maximum of 64 hours per year)	Grenoble INP - ESISAR, UGA in Valence
	Teaching processor architecture, C programming, recursive programming, data structures, and processor scheduling to engineering students.
2023 - 2024	Work-Study Program Student	French Navy in Brest
	Engineering of a Wiegand interface for information systems in the context of security.
2023 (3 months)	Intern	ENSTA Bretagne in Brest
	Development of a secure SoC simulator.

Education

2024 - Now	PhD thesis	Grenoble INP - LCIS, UGA in Valence
	"Secure Compiler Back-end / Hardware Codesign", supervised by Laure Gonnord, Bruno Ferres and David Hély
2022 - 2024	Master's degree in computer sciences - Software for embedded systems	UBO in Brest
	Learned about software engineering, safety and security of systems, processor scheduling, parallel programming, distributed systems and AI for embedded systems. Systèmes sur puce
2019-2022	Bachelor's degree in computer sciences	UBO in Brest
	Learned about computer languages, algorithms, information systems, systems architecture, graphs, compilation and object oriented programming.
2016-2019	Baccalauréat in Sciences	Lycée de Cornouaille in Quimper

Interests

Research Interests	Compiler back-ends, hardware security, RISC-V architectures, secure code generation, embedded systems
Teaching Interests	Processor architecture, C programming, software engineering, processor scheduling
Languages	C, C++, Python, Java, Ada, SmallTalk

Additional information

My name is Clara, I’m a PhD student in computer sciences since october 2024. I come from Quimper in France. This is a city placed in the Finistère - a department of France - in the extreme west of Brittany. I am currently working at the Grenoble INP - LCIS laboratory in Valence 26000, France.

My PhD thesis is about secure code generation with the help of compiler back-ends. We (me and my supervisors Laure Gonnord, Bruno Ferres, and David Hély) claim that compiler back-ends are an efficient way to generate secure-and-optimized code.

Primary tabs