26/04 - Fakhreddine GHAFFARI seminar

Fakhreddine Ghaffari seminar, candidate at the PR61 position, will take place Wednesday the 26th of April from 16:30 to 17:30, online.

Abstract

In this seminar, I summarize my recent research results on effective design of embedded Systems on Chip (SoC). When these systems operate in hostile environments, their design problem becomes increasingly complex. In addition to classic constraints such as execution time, consumption, and surface area, other environmental constraints are added, such as reliability against transient faults. Within the framework of our research work on SoC design for different application domains, including healthcare, aeronautics, aerospace, and automotive, we propose new paradigms for error-correcting code (ECC) based on specific families of LDPC codes. In the first part of this seminar, I present our contributions to efficient implementation of these LDPC algorithms on reconfigurable targets such as FPGAs with SRAM or ASICs. In the second part, I present our contributions to resolving scientific challenges related to SoC design under critical constraints in each application domain. We will study, in particular, the observability of a microprocessor-based system when it is exposed to particle radiation at high altitude. Finally, for the healthcare domain, we propose solutions to improve the precision of EEG signal classification when the processing chain is implemented on-board.

Short biography

Fakhreddine Ghaffari holds a degree in electrical engineering and a Master's degree in Industrial Informatics from the École Nationale d'ingénieurs de Sfax (ENIS), Tunisia, in 2001 and 2002 respectively, a Ph.D. in electronics from the University of Sophia Antipolis in 2006, and an HDR from CY Cergy Paris Université in 2023. He is a professor at the university since September 2008. His research focuses on VLSI design and implementation of reliable digital architectures for wireless communication applications implemented on ASIC or FPGA platforms, as well as mitigation of transient faults in systems operating in hostile environments.